Half-adder is a simple combinational circuit that can add only two bits together. It is a combination of XOR gate and AND gate where XOR gate is used to perform addition and AND gate is used to get the carry output.
Sum = X XOR Y;
Carry = XY
Input | Output | ||
---|---|---|---|
x | y | sum | carry |
0 | 0 | 0 | 0 |
0 | 1 | 1 | 0 |
1 | 0 | 1 | 0 |
1 | 1 | 0 | 1 |
Half-adder receives two inputs and produces two outputs. The inputs are the two bits to be added and the outputs are sum and carry.
The logic diagram for half-adder has two gates: XOR and AND. The XOR gates produces sum and AND get produces carry. For example if the inputs are 0 and 1 then the output of XOR gate will be the sum, 1 and carry, 0.
The disadvantage is that it will not be useful for adding large binary numbers.
What is hard computing? Hard computing is a traditional computing. It requires a precisely stated…
Soft computing is a problem solving technology. It tends to fuse synergically different aspects of…
Cluster computing is an approach to achieve high performance, reliability or high throughput computing by…
Magnitude Comparator is a combinational circuit capable of comparing the relative magnitude of two binary…
Full subtractor is a combinational circuit capable of performing subtraction on two bits namely minuend…
Half-subtractor is a combinational circuit capable of subtracting a binary number from another binary number.…