D Flip-flop
Written on April 27, 2015 – 9:44 am | by Robin |D flip-flop means data flip-flop. It is also called delay flip-flop. It has two inputs: normal
input D and a clock input. It has two outputs say Q and its complement Q’. D flip-flop assumes the state of input D. If D(t) is 1 then Q(t+1) is also 1. Similarly if D(t) is 0 then Q(t+1) is also 0.
