Ring Counters
Ring counters can be formed by arranging shift registers. Serial output of the shift register is connected to its serial input in ring counter. Ring counter is used for timing sequence generation.
Types of ring counters
There are two types: standard ring counter and twisted ring counter.
1. Standard ring counter
A mod-N standard ring counter needs N flip-flops. It is implemented using a serial-in serial-out shift register. The serial output of the shift register is fed back to its serial input. One of the flip-flops is initialized as 1 while all other flip-flops are cleared. The single 1 bit is shifted from one flip-flop to another for each clock pulse. As the output is given as input, the bit will keep on moving through the shift register as long as clock pulses are applied. This will produce N distinct states for each full circle as there are N flip-flops in the shift register.
Figure(a): Logic diagram of standard ring counter
Figure(a) shows a 4-bit standard ring counter. It is implemented with JK flip-flops. It is designed in such a way that the least significant flip-flop (A0) is initially set while all other flip-flops are reset.
Fig(b): Timing diagram of standard ring counter
Though the shift register can assume 16 states as there are four flip-flops, only four are valid states. So if the counter has N flip-flops then there will be N valid state and 2N – N invalid states. Valid state has only one set flip-flop. Invalid state has more than one set flip-flop.
| A3 | A2 | A1 | A0 |
|---|---|---|---|
| 0 | 0 | 0 | 1 |
| 0 | 0 | 1 | 0 |
| 0 | 1 | 0 | 0 |
| 1 | 0 | 0 | 0 |
Table 1: Count sequence for the ring counter
Disadvantage
Once the counter is in an invalid state, it will never resume the proper count sequence unless it is forced to be in a state where only one flip-flop is set.
Self-starting standard ring counter
The standard ring counter can be modified in such a way that the counter will correct itself when it gets into invalid state.
Fig(c): Self-starting standard ring counter
Figure(C) shows the counter with self-starting feature. In this counter, serial input is obtained from (A0 + A1 + A2)’. The counter may take up to 4 clock pulses to make the correction.
2. Twisted ring counter
Twisted ring counter is also called switch-tail or Johnson counter. It is a circular shift
register in the complement of the serial output is given as serial input. Using this counter
number of valid states can be doubled.
Twisted ring counter can be obtained by modifying the standard ring counter in such a way that the counter starts from a cleared state and then follows the sequence of 8 distinct states.
Figure(d): Logic diagram of twisted ring counter
The twisted ring counter starts from cleared state which can be obtained using the CLEAR line and follows the sequence of 8 states as shown in Table 2.
| State | A3 | A2 | A1 | A0 |
|---|---|---|---|---|
| S0 | 0 | 0 | 0 | 0 |
| S1 | 0 | 0 | 0 | 1 |
| S2 | 0 | 0 | 1 | 1 |
| S3 | 0 | 1 | 1 | 1 | S4 | 1 | 1 | 1 | 1 |
| S5 | 1 | 1 | 1 | 0 |
| S6 | 1 | 1 | 0 | 0 |
| S7 | 1 | 0 | 0 | 0 |
Table 2: Count sequence for the twisted ring counter